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PhD Student / Research Assistant (f/m/d)
Hardware Architecture and Design-space Exploration

Organisationseinheit

Institut für Technische Informatik (ITEC)

Ihre Aufgaben

Since many years, the Chair for Embedded Systems works internationally successfully in the areas of computer engineering, such as hardware- and computer architecture. Many interesting and open problems in these areas need to be addressed to successfully deploy such systems in modern application domains. As an example, the most urgent questions about application-specific accelerators, memory hierarchies, and design-space exploration are highlighted in the following.

An optimized hardware architecture is the core component for high performance, power efficiency, energy efficiency, etc. Application-specific accelerators combined with general-purpose processors allow maintaining a high programmability while offering high performance and efficiency as well. While processors with an application-specific instruction set (ASIPs) have been investigated since many years, developing a new IC for them is not feasible in all scenarios due to the high design- and manufacturing costs of recent technology nodes. Field-programmable gate arrays (FPGAs) are therefore gaining even more attraction to fill this gap, i.e., they are not only tailored to prototypes and emulations of to-be-developed ICs, but they emerged as promising choice for the final product. However, that comes with several challenges.

The frequency gap between production-grade CPUs and circuits implemented in FPGAs is noticeable (roughly 10x slower). It therefore demands optimized memory architectures, communication interfaces, and hardware parallelism to accomplish a significant advantage by using FPGAs. As example, recent applications that demand hardware acceleration include convolutional neural networks (CNNs). Instead of using general-purpose accelerators for CNN inference (e.g. GPUs or TPUs) with their high power requirements, FPGAs allow deploying application-specific CNN implementations, i.e., the computation, on-chip storage, and communication between all components can be tailored to the specific CNN structure, even including the bit-width of the data and the values of the weights. In addition, the runtime reconfigurability of FPGAs can be exploited to increase the utilization of the available FPGA fabric. Due to this huge and complex design space (i.e., the cross product of all design parameters), automatic design-space-exploration (DSE) tools need to be employed to generate the hardware architecture automatically. These DSE tools are typically not generic, but they highly benefit from application-specific domain expertise to find good architectural solutions fast. Developing application-specific architectures, along with DSE tools to generate them automatically, is the basic scope of this project.

Further details can be found on our webpage: ces.itec.kit.edu.

Eintrittstermin

as soon as possible

Ihre Qualifikation

The candidate (f/m/d) must have a very good Master's degree (or equivalent) in CS or EE with background or specialization in some of the above-mentioned topics, i.e., hardware architecture, design-space exploration, and/or embedded systems. The ideal candidate (f/m/d) shows a strong interest and motivation to deepen in these topics to a level required for a doctorate. Programming skills in C/C++ and VHDL/Verilog, and experience in synthesis tools, CPU/system simulators, and/or embedded operating systems will be very beneficial. Fluency in written and spoken English is a prerequisite. We are looking for a highly motivated candidate (f/m/d) with a strong commitment to research ethics and teamwork. Good communicative skills are mandatory due to the interdisciplinary structure of the project and the team.

Salary

Salary category EG 13, depending on the fulfillment of professional and personal requirements.

Contract duration

limited for 1 year with the possibility for multi-year extension

Application up to

January 15, 2023

Contact person in line-management

For further information, please contact Prof. Henkel, email: henkel@kit.edu and Dr. Bauer, email: lars.bauer@kit.edu.

Application

Please send your application including a cover letter, your CV, and all certificates/referees in electronic form to: lars.bauer@kit.edu.

vacancy number: 2289/2022

We prefer to balance the number of employees (f/m/d). Therefore, we kindly ask also female applicants to apply for this job.

Recognized severely disabled persons will be preferred if they are equally qualified.