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30-2020-IPE PhD Position: Advancing front-end readout ASICs with BiCMOS SiGe technology for ultra-fast sensors

Organizational unit

Institute for Data Processing and Electronics (IPE)

Job description

Innovations in electronics have often enabling break-throughs in experimental techniques in nuclear, particle, hadron physics and for novel detectors. The front-end electronics is a core component of any detector system. It defines its properties and fulfils the task of collecting, amplifying, storing and processing the signal coming from the sensor and transferring it to the back-end electronics for further digital processing. Recently a new generation of ultra-fast detectors appeared, that is able to measure both the spatial and the time with very high accuracy in the order ∼10 ps and are driving progress in high energy physics and photon science. Ultra-fast SiPM detectors are used in astroparticle physics. Terahertz science has become increasingly popular because it allows researchers to carry out time-resolved “far-infrared” (FIR) studies and to explore spectroscopy and imaging applications in the submillimeter wavelength regime. For all those new classes of ultra-fast sensors, dedicated readout electronics with a wideband input stage architecture are required. The electronics need to preserve the fast signals while keeping the noise level low.

The PhD work will focus on investigation and development of a novel wideband front-end architecture to manage the ultra-fast (picoseconds) signals generated by ultrafast detectors. To benefit from the available technologies, the structures will be developed in the recent submicrometer BiCMOS SiGe technology, which allows to combine high-frequency circuits with a large voltage swing. Several aspects of the investigation must be properly considered: the noise analysis with the identification of type, parallel and series contributions, the equivalent noise sources related to the input transistors, the impedance matching of the input amplifiers with the sensor element, the maximum operating frequency, the noise rejection including the crosstalk mitigation, the signal-to-noise and the dynamic input range.

The new front-end electronics will be evaluated with two applications. The first is the development of the first ultra-fast pixelated terahertz camera operating at the unprecedented frame rate of 500 Mfps in continuous readout mode. Such device will be an indispensable detector to be employed in the next generation of the beam diagnostics instrumentation of the current and the future synchrotron and plasma accelerator machines. The second application is the readout of SiPMs of the AMIGA muon detectors. Within this PhD project the following tasks should be performed:

  1. Explore and perform the noise analysis of several input stages based on input impedance-controlled gate-amplifiers and compare the performance with the more classic charge-sensitive-amplifier.
  2. Design and submission of an ASICs chip with several front-end candidate architectures and perform both the noise and signals measurements.
  3. Development of a front-end readout chip to be connected with a pixelated terahertz sensor by gold-stud bump-bonding technology.
  4. Optimization, final submission and measurement of the first pixelated terahertz camera in the experimental area.

The thesis requires in-depth R&D on advanced design and submission of microcircuits in novel and advanced sub-nanometer BiCMOS technology and the deep noise characterization. The research plan includes the design of microelectronics, test & validation and scientific publication are part of the PhD process. The research activities are embedded in the international ASICs detector community i.e. with CERN, Universidad Nacional de San Martin (UNSAM) and IHP Solutions GmbH [1]. Supervision of bachelor and master students, presentations at scientific conferences, and writing high-impact journal articles is expected.

Starting date

as soon as possible

Personal qualification

A master degree in Electrical Engineering, physics or equivalent is required. Experience in ASICs design is a definite advantage, as well as being comfortable in specifying system components and sound experimental problem-solving skills. You are a naturally curious person who is eager to learn fast and has a strong interest in research. Good English language proficiency is essential, basic German language skills are of advantage.

Contract duration

limited to 3 years

Application up to

30 November 2020

Contact person in line-management

For further information, please contact Dr.-Ing. Michele Caselle, phone 0721 608-25903; Mail:

Please apply online using the button below for this vacancy number 30-2020-IPE.

Ausschreibungsnummer: 30-2020-IPE

If qualified, severely disabled persons will be preferred.


Personnel Support is provided by:
Ms Perkovic
Phone: +49 721 608-25006,

Hermann-von-Helmholtz-Platz 1, 76344 Eggenstein-Leopoldshafen, Germany